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Embedded System Engineer, Emerging Computer Architectures

Date: Sep 27, 2022

Location: Oak Ridge, TN, US, 37830

Company: Oak Ridge National Laboratory

Requisition Id 8180 


We are seeking an FPGA Design Engineer to design, test, debug, and evaluate FPGA implementations for the exploration of emerging computer architectures and scientific and machine learning algorithms for heterogeneous HPC computing as well as scientific edge computing.


This position will be in the Advanced Computing Systems Section within the Computer Science and Mathematics (CSM) Division. CSM delivers fundamental and applied research capabilities in a wide range of areas, including applied mathematics and computer science, experimental computing systems, scalable algorithms and systems, artificial intelligence and machine learning, data management, workflow systems, analysis and visualization technologies, programming systems and environments, and system science and engineering. The Architectures and Performance Group investigates emerging computing architectures for future scientific HPC and AI workloads and develops methods and tools for evaluation.



Major Duties/Responsibilities:


Responsibilities for this position include working closely with the project team to design, optimize, test, and debug FPGA implementations. Activities include, but are not limited to:


  • Rapid design, optimization, testing, and evaluation of FPGA implementations.
  • Assisting software and middleware developers in conducting end-to-end system-level performance evaluation.
  • Disseminate the outcomes of experimentation in the forms of technical reports and presentations. Assist the formal knowledge dissemination as in whitepapers, conference presentations and/or journal publications.
  • Actively collaborating with industry, academia, and government labs to maintain up-to-date knowledge on FPGA development methods and solutions.



Basic Qualifications:

  •  BS degree in computer science, computer engineering, electrical engineering, or related discipline and 2+ years of hands-on experience in FPGA development on modern FPGA platforms.


Preferred Qualifications:

  • MS degree preferred.
  • Excellent interpersonal skills, oral and written communication skills, and strong personal motivation.
  • The ability to work in a dynamic, interdisciplinary team.
  • A track record in FPGA development using RTL (VHDL or Verilog) and/or HLS design flows.
  • 3+ years of experience in at least ONE of the following areas:
    • Intel (Altera) FPGA products, toolchain, and design experience.
    • AMD/Xilinx FPGA products, toolchain, and design experience.
  • Experience with writing test benches and testing methodologies for FPGA debugging
  • Experience with software development methodologies and tools, such as Git, containers, CMake, CI/CD, Python.
  • Experience with the Linux computing environment and shell scripting.
  • Knowledge of scripted and automated FPGA development flow is a plus, but is not required.
  • Knowledge of HPC and machine learning is a plus, but is not required.
  • Knowledge of NI Labview FPGA flow is a plus, but is not required.


***Visa sponsorship is not available with this position.


 ORNL Ethics and Conduct:

As a member of the ORNL scientific community, you will be expected to commit to ORNL's Research Code of Conduct. Our full code of conduct, and a statement by the Lab Director's office can be found here:


Benefits at ORNL:  

UT Battelle offers an exceptional benefits package to include matching 401K, Pension Plan, Paid Vacation, and Medical / Dental plan. Onsite amenities include Credit Union, Medical Clinic, and free fitness facilities.   



UT Battelle offers a wide range of relocation benefits for individuals and families to make it easier to come and work here. If you are invited to interview, please ask your Recruiter about relocating with ORNL. 




This position will remain open for a minimum of 5 days after which it will close when a qualified candidate is identified and/or hired.

We accept Word (.doc, .docx), Adobe (unsecured .pdf), Rich Text Format (.rtf), and HTML (.htm, .html) up to 5MB in size. Resumes from third party vendors will not be accepted; these resumes will be deleted and the candidates submitted will not be considered for employment.

If you have trouble applying for a position, please email

ORNL is an equal opportunity employer. All qualified applicants, including individuals with disabilities and protected veterans, are encouraged to apply.  UT-Battelle is an E-Verify employer.

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